Description

NVIDIA is hiring an ASIC Verification Engineer in Hyderabad, India.

The role combines hardware and software development, with a focus on SoCV testbench infrastructure, bare-metal boot, silicon bring-up tools, and CPU/SoC/GPU test frameworks.

The engineer will build tools, infrastructure, and test frameworks used across RTL simulation, C simulation, emulation, FPGA, and silicon environments. The role also involves understanding Tegra system architecture, SoC boot and security features, and developing tools that enable design and verification teams to access registers, memory, DMA engines, and other hardware features.

Responsibilities

Build tools, infrastructure, and test frameworks for RTL simulations, C simulations, emulation, FPGA, and silicon.
Understand Tegra system architecture and SoC IPs involved in boot and security.
Develop tools that enable Design and Verification teams to access registers, memory, DMA engines, and other SoC features.
Enable test reuse across RTL, models, emulation, and silicon platforms.
Develop features supporting silicon bring-up, including FUSE, ATE, security, Flash/DMA, board I2Cs, and USB debug devices.
Assess and build C-model or RTL-simulation capabilities for pre-silicon environments.
Develop scalable and maintainable software and test frameworks.
Contribute across the hardware and software development lifecycle.

Requirements

BS or MS in Computer Science, Electronics Engineering, or equivalent experience.
0–2 years of experience.
Strong programming skills in C, C++, and Python.
Understanding of SoC and system architecture.
Understanding of SoC devices and concepts including DMA, interrupt engines, CPU, boot devices, and MMU/IOMMU.
Knowledge of operating system and device-driver concepts.
Ability to write no-OS test frameworks that run directly on bare-metal SoCs.
Ability to develop scalable and maintainable software.
Understanding of hardware and/or software development lifecycle.
Previous experience with silicon bring-up and emulation/FPGA test frameworks is a plus.
Exposure to C++ testbench architectures and SystemVerilog/UVM-based testbenches is a plus.
Verilog and SystemVerilog coding skills are a plus.

ASIC Verification Engineer

Description

Responsibilities

Requirements

Required Skills

NVIDIA

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